Design Architecture

Download Analog Integrated Circuit Design Automation: Placement, by Ricardo Martins, Nuno Lourenço, Nuno Horta PDF

By Ricardo Martins, Nuno Lourenço, Nuno Horta

This e-book introduces readers to numerous instruments for analog format layout automation. After discussing the location and routing challenge in digital layout automation (EDA), the authors assessment quite a few computerized format iteration instruments, in addition to the latest advances in analog layout-aware circuit sizing. The dialogue contains diverse tools for automated placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The innovations and algorithms of the entire modules are completely defined, allowing readers to breed the methodologies, enhance the standard in their designs, or use them as place to begin for a brand new instrument. the entire equipment defined are utilized to useful examples for a 130nm layout technique, in addition to placement and routing benchmark sets.

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Additional info for Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques

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Integr. Circuits Syst.  Syrzycki, A tool for automated analog CMOS layout module generation and placement. IEEE Can. Conf. Elect. Comput. Eng. 1, 416–421 (2002) 9.  Smith, Introduction to Evolutionary Computing (Springer, Berlin, 2003) 10.  Shahookar, Macro-cell and module placement by genetic adaptive search with bitmap-represented chromosome. Integr.  12(1), 49–77 (1991) 11.  Vornberger, Hybrid genetic algorithms for constrained placement problems. IEEE Trans. Evol. Comput. 1(4), 266–277 (1997) 12.

The designer must devise an architecture suitable to implement the system specifications and then all the blocks. From the high-level specifications to the devices sizes all blocks must be properly sized. This task is commonly done manually, the designer starts by finding an approximate solution using simplified analytical expressions, and then iteratively, adjusts the solution until it meets all specifications. Another possibility for circuit sizing is the use of circuits’ synthesizers. These tools are used to automate the circuit sizing and can be: (1) equation-based, where the methods use analytic design equations to evaluate the circuit performance or (2) simulation-based, which do not comprise a previous modeling task, but require higher execution time than equation-based due to the verification done using electrical simulations.

Cell translation or rotation) and, since no restriction is made referring to the relative position of a cell with respect to another cell (except in some cases for symmetry pairs) a huge search space of both feasible and unfeasible solutions needs to be explored. The first use of absolute coordinates is reported in [3]. , the coordinates and, if allowed, the rotation of each cell) and α is the weights vector. , f2(x) = 0, to attain an admissible placement) between cells. , aspect ratio of the floorplan, estimation of net length (by means of a pseudo-­ Spanning tree), proximity and/or merge considerations.

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